Abstract

power integrity webinar screenshotToday’s high-speed digital PCB designs fail frequently due to poor power integrity. While tools exist to validate a design’s power integrity, it’s important for the entire design team to have an understanding of the mechanisms that help or hinder a PCB’s power integrity.

This session presents aspects of achieving good power integrity by defining key concepts, showing example layouts, and using PI analysis tools to help better understand PI effects and mitigation techniques. Upon completion of this webinar, the electrical engineer and PCB designer alike should be armed with essential information that will help the team improve the power integrity aspects of their design.

What you will learn

- What power bus impedance is, what elements affect it, and why the PCB designer should care
- How the placement and values of decoupling capacitors affect power bus impedance
- What the basics are of PI-DC (power bus voltage drop) PCB layout design practices that help minimize PI and PI-DC issues

Who should attend

PCB Designers, design engineers, engineering managers, manufacturing engineers


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